I'm looking for senior ASIC design roles in San Jose focused on FPGA prototyping, with at least 8 years of experience in related fields and a Bachelor's in Electrical Engineering.

Okay, I found several senior ASIC design positions in San Jose that focus on FPGA prototyping, requiring at least 8 years of experience and a Bachelor's degree in Electrical Engineering. There are currently 142 positions matching your criteria.

Senior ASIC Design Engineer

San Jose, CA

8 years + Experience

Bachelor

FPGA Prototyping

Can you help me to analyze the job description and company culture?

Sure. Here's the analysis:

Job Analysis:

The Technical Leader ASIC Design - Prototyping role at Cisco demands a seasoned engineer with a robust background in ASIC design and FPGA prototyping, essential for advancing the company’s innovative chip development efforts. The core purpose of this position is to leverage extensive experience to map complex SoC designs to FPGAs, contributing to the seamless integration of networking capabilities in advanced devices. Importantly, this role requires high-level collaborative engagement with design, verification, and software teams, emphasizing the need for clear communication and an understanding of interdisciplinary workflows. The responsibilities encompass establishing prototyping systems and defining methodologies, which not only support current projects but also enhance future processes, reflecting a strategic focus on efficiency and innovation. Success in this role is defined by the ability to navigate complex technical challenges and produce reliable prototypes that meet both functional and performance benchmarks, indicating a direct impact on product timelines and quality. Candidates will be tasked with making significant design decisions, often under tight deadlines, requiring both technical acumen and creative problem-solving skills.

Company Analysis:

Cisco operates as a world leader in technology, focusing on innovation and security in network connections. Positioned at the forefront of the AI revolution, Cisco emphasizes creating reliable, interconnected solutions that foster digital resilience. This forward-thinking, innovation-driven culture is indicative of a fast-paced work environment where adaptability and creativity are crucial. Given the company's commitment to inclusion and connection—values that are deeply embedded in its mission—this role is likely set within a dynamic team looking to push the boundaries of technology. As part of the ASIC engineering team, the Technical Leader will play a pivotal role in shaping Cisco's ambitious product roadmap while enjoying significant visibility within a collaborative framework. This position not only contributes to individual career growth but also aligns with Cisco's strategic goals of enhancing connectivity and security for its customers in an increasingly complex digital landscape.

Mock up some interview questions based on the job description.

Absolutely. Here are some mock interview questions that could come up:

Tell me about a time when you had to troubleshoot a complex ASIC design issue. What was the problem, and how did you resolve it?
Describe a project where you collaborated with cross-functional teams. How did you ensure effective communication and alignment on your objectives?
Can you provide an example of how you have used FPGA prototyping tools in a previous role? What were the challenges you faced?
When faced with tight deadlines, how do you prioritize tasks and ensure the quality of your work during the ASIC design process?
How would you map a multi-million gate SoC design to an FPGA? What key considerations would you keep in mind?
Describe your process for validating the functional and performance objectives of an SoC. What tools and methodologies do you typically use?
Imagine you are tasked with integrating a third-party IP into your FPGA design, but encounter compatibility issues. How would you handle this situation?
If a key functional requirement for a project is not being met, what steps would you take to identify the root cause?
Why are you interested in working at Cisco specifically, and how do you see your skills aligning with our mission?
Can you explain how the innovations in ASIC technology are influencing the networking industry today?
What motivates you to stay updated with the latest developments in FPGA design and ASIC technology?
Are there any specific industry trends you believe will impact Cisco’s ASIC design approach in the next few years?
What do you see as the key challenges in the ASIC prototyping process within a fast-paced tech environment like Cisco?
What types of projects have you worked on that required you to engage with both software and hardware teams? How did you handle the collaboration?
What questions do you have for us about the team dynamics or projects you'll be involved in within this role?

Job Details

Overview Company

Technical Leader ASIC Design

Cisco

a day ago

Highlight

OnsiteFull-time10+ yearsSenior

Summary

Cisco is seeking a Technical Leader ASIC Design - Prototyping to join their team in San Jose, CA. The role involves engaging in every facet of chip design, from architecture to validation, using the latest silicon technologies to create groundbreaking devices.

About the Role

As a Technical Leader ASIC Design - Prototyping, you will be responsible for mapping multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. You will establish prototyping systems in the lab and contribute to defining, evolving, and supporting prototyping methodology. The role includes collaborating with Software, Design, and Verification teams to validate the functional and performance objectives of the SoC.

About You

Required:

Bachelor's Degree in Electrical or Computer Engineering with a minimum of 10 years of experience in ASIC or a related field, or a Master's Degree in Electrical or Computer Engineering with at least 8 years of experience in ASIC or a related discipline.
Comprehensive understanding of FPGA design, with proven expertise in partitioning multi-million gate designs across multiple FPGAs.
Proficiency in synthesis, place, and route flows for FPGAs.
In-depth knowledge of digital design concepts, including Clock Domain Crossing (CDC), Reset Domain Crossing (RDC).
Demonstrated experience in RTL coding using Verilog/System Verilog and integration of third-party IPs.
Meticulous and methodical approach to triaging, debugging, and identifying root causes of issues throughout various phases of FPGA development.

Preferred:

Experience in prototyping Networking System-on-Chips (SoCs) on HAPS or equivalent prototyping platforms.
Strong understanding of PCIE, DDR, Ethernet, and Networking Protocols.
Proficiency in prototyping ARM or RISCV CPUs.
Exceptional scripting skills using languages such as TCL, Python, or Perl.

Cisco

Cisco is the worldwide technology leader that is revolutionizing the way organizations connect and protect in the AI era. For more than 40 years, Cisco has securely connected the world. With its industry leading AI-powered solutions and services, Cisco enables its customers, partners and communities to unlock innovation, enhance productivity and strengthen digital resilience. With purpose at its core, Cisco remains committed to creating a more connected and inclusive future for all.

San Jose, CA