Rivos Inc. is seeking a SOC Physical Design professional for a full-time position in the Greater Fort Collins Area. The role involves SOC physical implementation from unit level to chip level, focusing on various aspects of physical design functions.
About the Role
As a SOC Physical Design engineer, you will own block level design from RTL-to-GDSII, driving synthesis, floor-planning, place & route, timing closure, and signoff. You will collaborate with Micro-architects to perform feasibility studies and explore performance, power & area (PPA) tradeoffs. Additionally, you will develop physical design methodologies and customize recipes to optimize PPA, working with a multi-functional engineering team to validate physical design through all signoff flows.
About You
Required:
PhD, Master’s Degree or Bachelor’s Degree in a technical subject area.
Knowledge using synthesis, place & route, analysis and verification CAD tools.
Familiarity with logic & physical design principles for low-power & higher-performance designs.
Knowledge of scripting in Unix, Perl, Python, and TCL.
Good understanding of device physics and experience in deep sub-micron technologies.
Knowledge of Verilog and SystemVerilog.
Excellent problem-solving skills and ability to communicate effectively.
Preferred:
Experience working in a team and being productive under aggressive schedules.
Strong organizational skills and self-motivation.
Rivos Inc.
Rivos, a high performance RISC-V System Startup targeting integrated system solutions for Enterprise
Company Size: 51-200 employeesComputer Hardware Manufacturing